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基于FPGA的数字系统设计实验3控制液晶显示屏显示字符OK(7)

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parameter state50 = 6'b110010; parameter state51 = 6'b110011; parameter state52 = 6'b110100; parameter state53 = 6'b110101; parameter state54 = 6'b110110; parameter state55 = 6'b110111; parameter state56 = 6'b111000; parameter state57 = 6'b111001; parameter state58 = 6'b111010; parameter state59 = 6'b111011;

reg [5:0] state; reg state_change;

always @(posedge clk or posedge reset) if(reset) begin

state_change <= 1'b0; delay_count <= 1'b1; end else

if(delay_count == num_count - 1) begin

state_change <= 1'b1; delay_count <= 1'b1; end else

begin

state_change <= 1'b0;

delay_count <= delay_count + 1'b1; end

always @(posedge state_change or posedge reset) if(reset) begin

state <= state1;

num_count <= 20'd750000;

end else

case(state)

state1:begin

state <= state2; num_count <= 20'd4;

lcd_rs <= 1'b0; lcd_e <= 1'b0; lcd_d <= 4'h3; end

state2:begin

state <= state3;

num_count <= 20'd12; lcd_e <= 1'b1; end

state3:begin

state <= state4;

num_count <= 20'd205000; lcd_e <= 1'b0; end

state4:begin

state <= state5;

num_count <= 20'd4; lcd_d <= 4'h3; end

state5:begin

state <= state6;

num_count <= 20'd12; lcd_e <= 1'b1; end

state6:begin

state <= state7;

num_count <= 20'd5000; lcd_e <= 1'b0; end

state7:begin

state <= state8; num_count <= 20'd4; lcd_d <= 4'h2; end

state8:begin

state <= state9;

num_count <= 20'd12; lcd_e <= 1'b1; end

state9:begin

state <= state10;

num_count <= 20'd4000; lcd_e <= 1'b0; end

//set funtion mode state10:begin

state <= state11;

num_count <= 20'd4; lcd_rs <= 0; lcd_d <= 4'h2; end

state11:begin

state <= state12;

num_count <= 20'd12; lcd_e <= 1'b1; end

state12:begin

state <= state13;

num_count <= 20'd80; lcd_e <= 1'b0; end

state13:begin

state <= state14; num_count <= 20'd4; lcd_d <= 4'h8; end

state14:begin

state <= state15;

num_count <= 20'd12; lcd_e <= 1'b1; end

state15:begin

state <= state16;

num_count <= 20'd4000; lcd_e <= 1'b0; end //set entry mode state16:begin

state <= state17; num_count <= 20'd4; lcd_d <= 4'h0; end

state17:begin

state <= state18;

num_count <= 20'd12; lcd_e <= 1'b1; end

state18:begin

state <= state19;

num_count <= 20'd80; lcd_e <= 1'b0; end

state19:begin

state <= state20; num_count <= 20'd4; lcd_d <= 4'h6; end state20:begin

state <= state21;

num_count <= 20'd12; lcd_e <= 1'b1; end state21:begin

state <= state22;

num_count <= 20'd4000; lcd_e <= 1'b0; end

//set display on/off

state22:begin state <= state23; num_count <= 20'd4; lcd_d <= 4'h0;

end state23:begin

state <= state24;

num_count <= 20'd12; lcd_e <= 1'b1; end state24:begin

state <= state25;

num_count <= 20'd80; lcd_e <= 1'b0; end state25:begin

state <= state26; num_count <= 20'd4; lcd_d <= 4'hc; end

state26:begin state <= state27;

num_count <= 20'd12; lcd_e <= 1'b1; end state27:begin

state <= state28;

num_count <= 20'd4000; lcd_e <= 1'b0; end //clear display

state28:begin state <= state29; num_count <= 20'd4; lcd_d <= 4'h0; end state29:begin

state <= state30;

num_count <= 20'd12; lcd_e <= 1'b1; end state30:begin

state <= state31;

num_count <= 20'd80;

lcd_e <= 1'b0; end state31:begin

state <= state32;

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