基于FPGA的数字系统设计实验3控制液晶显示屏显示字符OK(3)

cur_state <= entry_set; else

cur_state <= function_set; end if;

when entry_set => if(i2 = 2000) then

cur_state <= set_display; else

cur_state <= entry_set; end if;

when set_display => if(i2 = 2000) then

cur_state <= clr_display; else

cur_state <= set_display; end if;

when clr_display => i3 <= 0;

if(i2 = 2000) then cur_state <= pause; else

cur_state <= clr_display; end if;

when pause => if(i3 = 82000) then cur_state <= set_addr; i3 <= 0;else

cur_state <= pause; i3 <= i3 + 1; end if;

when set_addr => if(i2 = 2000) then cur_state <= char_f; else

cur_state <= set_addr; end if;

when char_f => if(i2 = 2000) then cur_state <= char_p; else

cur_state <= char_f; end if;

when char_p => if(i2 = 2000) then

cur_state <= char_g; else

cur_state <= char_p; end if;

when char_g => if(i2 = 2000) then cur_state <= char_a; else

cur_state <= char_g; end if;

when char_a => if(i2 = 2000) then cur_state <= done; else

cur_state <= char_a; end if;

when done => cur_state <= done; end case; end if;

end process display; with mux select

SF_D <= SF_D0 when '0', --transmit SF_D1 when others; --initialize with mux select

LCD_E <= LCD_E0 when '0', --transmit LCD_E1 when others; --initialize --specified by datasheet

transmit : process(clk, reset, tx_init) begin

if(reset='1') then tx_state <= done;

elsif(clk='1' and clk'event) then case tx_state is

when high_setup => --40ns LCD_E0 <= '0';

SF_D0 <= tx_byte(7 downto 4); if(i2 = 2) then

tx_state <= high_hold; i2 <= 0; else

tx_state <= high_setup;i2 <= i2 + 1; end if;

when high_hold => --230ns

LCD_E0 <= '1';

SF_D0 <= tx_byte(7 downto 4); if(i2 = 12) then tx_state <= oneus; i2 <= 0; else

tx_state <= high_hold; i2 <= i2 + 1; end if;

when oneus => LCD_E0 <= '0'; if(i2 = 50) then

tx_state <= low_setup; i2 <= 0; else

tx_state <= oneus; i2 <= i2 + 1; end if;

when low_setup => LCD_E0 <= '0';

SF_D0 <= tx_byte(3 downto 0); if(i2 = 2) then

tx_state <= low_hold; i2 <= 0; else

tx_state <= low_setup; i2 <= i2 + 1; end if;

when low_hold => LCD_E0 <= '1';

SF_D0 <= tx_byte(3 downto 0); if(i2 = 12) then tx_state <= fortyus; i2 <= 0; else

tx_state <= low_hold; i2 <= i2 + 1; end if;

when fortyus => LCD_E0 <= '0'; if(i2 = 2000) then tx_state <= done; i2 <= 0; else

tx_state <= fortyus; i2 <= i2 + 1; end if;

when done => LCD_E0 <= '0'; if(tx_init = '1') then tx_state <= high_setup; i2 <= 0; else

tx_state <= done; i2 <= 0; end if; end case; end if;

end process transmit;--specified by datasheet

power_on_initialize: process(clk, reset, init_init) --power on initialization sequence begin

if(reset='1') then init_state <= idle; init_done <= '0';

elsif(clk='1' and clk'event) then case init_state is when idle => init_done <= '0'; if(init_init = '1') then init_state <= fifteenms; i <= 0; else

init_state <= idle; i <= i + 1; end if;

when fifteenms => init_done <= '0'; if(i = 750000) then init_state <= one; i <= 0; else

init_state <= fifteenms; i <= i + 1; end if;

when one =>

SF_D1 <= \LCD_E1 <= '1'; init_done <= '0';

if(i = 11) then init_state<=two; i <= 0; else

init_state<=one; i <= i + 1; end if;

when two => LCD_E1 <= '0'; init_done <= '0'; if(i = 205000) then init_state<=three; i <= 0; else

init_state<=two; i <= i + 1; end if;

when three => SF_D1 <= \LCD_E1 <= '1'; init_done <= '0'; if(i = 11) then init_state<=four; i <= 0; else

init_state<=three; i <= i + 1; end if;

when four => LCD_E1 <= '0'; init_done <= '0'; if(i = 5000) then

init_state<=five;i <= 0; else

init_state<=four; i <= i + 1; end if;

when five =>

SF_D1 <= \LCD_E1 <= '1'; init_done <= '0'; if(i = 11) then init_state<=six; i <= 0;

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