IDT70T3589S-133BFI中文资料(15)

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Timing Waveform of Left Port Write to Pipelined Right Port Read (1,2,4)

CLK"A"

R/W"A"

ADDRESS"A"

DATAIN"A"

CLK"B"

R/W"B"

ADDRESS"B"

DATAOUT"B"

NOTES:

1.CE0, BEn, and ADS = VIL; CE1, CNTEN, and REPEAT = VIH.

2.OE = VIL for Port "B", which is being read from. OE = VIH for Port "A", which is being written to.

3.If tCO tCO + 2 tCYC2 + tCD2). If tCO > minimum, then data from Port "B" read is available on first Port "B" clock cycle (ie, time from write to valid read on opposite portwill be tCO + tCYC2 + tCD2).

4.All timing is the same for Left and Right ports. Port "A" may be either Left or Right port. Port "B" is the opposite of Port "A"

Timing Waveform with Port-to-Port Flow-Through Read (1,2,4)

CLK"A"

R/W"A"

ADDRESS"A"

DATAIN"A"

CLK"B"

R/W"B"

ADDRESS"B"

DATAOUT"B"

NOTES:

1.CE0, BEn, and ADS = VIL; CE1, CNTEN, and REPEAT = VIH.

2.OE = VIL for the Right Port, which is being read from. OE = VIH for the Left Port, which is being written to.

3.If tCO tCO + tCYC + tCD1). If tCO > minimum, then data from Port "B" read is available on first Port "B" clock cycle (i.e., time from write to valid read on opposite port willbe tCO + tCD1).

4.All timing is the same for both left and right ports. Port "A" may be either left or right port. Port "B" is the opposite of Port "A".

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