EM78P372N数据手册(20)

EM78P372N数据手册

EM78P372N8-Bit MicrocontrollerBit 2 ~ Bit 1 (VREF1 ~ VREF0): ADC internal reference voltage sourceVREF1 0 0 1 1 VREF0 0 1 0 1 ADC Internal Reference Voltage VDD (default) 4.0V ± 1% 3.0V ± 1% 2.0V ± 1% NOTE If VREF [1:0]=00, internal reference doesn’t turn on. If VREF[1:0]≠ 00, internal reference will turn on automatically. Moreover, the power of internal reference is irrelevant to ADC.Bit 0 (ADICS): ADC Internal Channel Select (select ADC internal 1/4 VDD or OP output pin connected to ADC input) 0: Disable (default) 1: Enable6.1.10 Bank 0 RB (ADDATA: Converted Value of ADC)Bit 7 AD11 Bit 6 AD10 Bit 5 AD9 Bit 4 AD8 Bit 3 AD7 Bit 2 AD6 Bit 1 AD5 Bit 0 AD4When AD conversion is completed, the result is loaded into the ADDATA. The ADRUN bit is cleared and the ADIF is set. See Section 6.1.13, Bank 0 RE (Interrupt Status 2 and Wake-up Control Register). RB is read only.6.1.11 Bank 0 RC (ADDATA1H: Converted Value of ADC)Bit 7 “0” Bit 6 “0” Bit 5 “0” Bit 4 “0” Bit 3 AD11 Bit 2 AD10 Bit 1 AD9 Bit 0 AD8When AD conversion is completed, the result is loaded into the ADDATA1H. The ADRUN bit is cleared and the ADIF is set. See Section 6.1.13, Bank 0 RE (Interrupt Status 2 and Wake-up Control Register). RC is read only.14 Product Specification (V1.1) 05.24.2011(This specification is subject to change without further notice)

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