铅酸蓄电池修复新技术的研究(8)

石家庄铁道学院毕业论文

has no modern DSP a single period for slice.1980.The Japanese μ PD7720 that the company of NEC release is the first has the company of the multiplication machine uses the slice of DSP.The first adoption CMOS craft produces to float the company of Hitachi that order a the slice of DSP that days this,it releases to float to order in 1982 the slice of DSP.In 1983,Japanese MB8764 that the company of Fujitsu release,its instruction period is a 120 nests, and have a pair of internal and total lines, from but handle of swallowing and vomiting the deal took place a leap bigly .But the first high performance floats to order a DSP32 for shoaling be an AT& the company of T releases in 1984.

In so many DSP a category,a series of product of the Texas instrument company of the United States (Texas Instruments, brief name TI) is most successful .The 982 years in disaster in company in TI success releases to inspire the generation DSP a TMS32010 and its series product TMS32011,TMS32C10/ C14/ C15/ C16/ etc.of C17,releasing the next generation DSP a TMS32020, TMS320C25/ C26/ C28 one after another after,three generations DSP a TMS32C30/ C31/ C32,the fourth on behalf DSP a TMS32C40/ C44,the fifth on behalf DSP a TMS32C50/ C51/ C52/ C53 and gather several DSP in the integral whole of high performance DSP 芯 a TMS32C80/ etc.of C82.

Since 1980, an application for getting progress by leaps and bounds development,the slice of DSP is more and more extensive .From carries to calculate the speed to see,MAC(once multiplication with once addition) time is already from the beginning of 80's 400 ns(such as TMS32010) as low as 40 ns(such as TMS32C40), handle the ability improve more than 10 times .A multiplication for internal key machine parts occupies the mold area from the 1980 of 40 or so descend 5 below, an inside RAM increases a the piece measures the class is above .Seeing from manufacturing craft, adopting in 1980 4 the N ditch a MOS craft of us, but then widespread now adopt the second micron CMOS craft .An increment for leading feet quantity from the 1980 at most 64 increasing current and more than 200ly, leading feet quantity, mean the vivid and sexual increment in construction .In addition, a cost, physical volume, weight for of development, is the system of DSP consumes with the 功 all descent of having the very big degree.

The slice of DSP basic construction

The slice of DSP basic construction includes: (1) Harvard construction; (2) Flowing water line operation;

(3) Appropriative hardware multiplication machine;

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石家庄铁道学院毕业论文

(4) Special the instruction of DSP; (5) Fast instruction period. Harvard construction

Harvard structural and main characteristics is procedure with data saving in different and saving space, namely procedure saving machine with data saving the machine is two mutually independent saving machines, each saving machine independence plait address, independence interview. With two saving machines opposite should of establishes in the system total line in procedure with total line in data, from but make data swallowed to vomit the rate increases a times. Because procedure with saving machine is in twill discretely of space, therefore taking to point with carry out can completely layer after layer.

Flowing water line with Harvard the construction is related, a time for extensive adoption flowing water line then reducing instruction carrying out, from but strengthen the processor handles ability .The processor can proceed together to handle two to four instructions, each instruction is placed in the linear and different stage in flowing water. Show an example of a x-rated flowing water line operation into the diagram.

CLLOUT1

Take to point the N N-2 N-1 Translate the code N N-1 N-2 Carry out the Ns-1s N-2s N

Figure 4-1 x-rated flowing water line operations Appropriative hardware multiplication machine

The multiplication speed is more quickly; the processor of DSP function is higher. Because having the appropriative and applied multiplication machine, the multiplication can complete in an instruction period.

The special DSP instruction DSP slice is to adopt the special instruction.

Fast instruction period Harvard the construction, flowing water line operation, appropriative hardware multiplication machine, special the instruction of DSP pluses the integrated circuit excellent to turn the design can be made the slice of DSP instruction period is below 200 ns.

The system of DSP characteristics

The arithmetic figure signal handles system with the arithmetic figure signal handles for foundation, therefore have all characteristics that arithmetic figure handles:

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石家庄铁道学院毕业论文

(1) Connect a convenience. The system of DSP regard modern arithmetic figure technique as with other basal system or equipments is all mutually to permit concurrently, such system connects to realize a certain function wants to compare the emulation system connects with these systems want to be easily many.

(2) the plait distance is convenient .The programmable the slice of DSP 芯 that the system of DSP grow can make design the personnel in develop process vivid proceed the modification to the software expediently with promote to higher grade.

(3) The stability is good .The system of DSP with the arithmetic figure handles for foundation; suffer the influence between environment temperature and the voice of noise smaller, the dependable is high.

(4) The accuracy is high .The accuracy that 16 arithmetic figures system can attain. (5) The re-usable is good .The function that imitate the system suffers a machine a parameter function variety bigger, but the basic top in arithmetic figure system is uninfluenced, easy to test in system in for this reason arithmetic figure, adjust to try with the large-scale production.

(6) Gather convenience .DSP arithmetic figure in the system parts contain high norm, easy to and large-scale gather.

TMS320LF2407, TMS320LF2406, TMS320LF2402 DSP CONTROLLERS

SPRS094G – APRIL 1999 – REVISED AUGUST 2001

57 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443

Documentation support

Extensive documentation supports all of the TMS320?DSP family generations of devices from product announcement through applications development. The types of documentation available include: data sheets, such as this document, with design specifications; complete user’s guides for all devices and development support tools; and hardware and software applications. Useful reference documentation includes:

User Guides

TMS320LF/LC240xA DSP Controllers Reference Guide: System and Peripherals (literature number SPRU357)

Manual Update Sheet for TMS320LF/LC240xA DSP Controllers Reference Guide: System and Peripherals (SPRU357B) [literature number SPRZ015]

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石家庄铁道学院毕业论文

TMS320C240 DSP Controllers CPU,System, and Instruction Set Reference Guide (literature number SPRU160) Data Sheets TMS320LF2407A, TMS320LC2406A,

TMS320LC2404A, TMS320LC2402A DSP Controllers (literature number SPRS145) TMS320LF2407,TMS320LF2406,TMS320LF2402 DSP Controllers (literature number SPRS094)

TMS320LF2401A DSP Controller (literature number SPRS161) Application Reports

3.3V DSP for Digital Motor Control (literature number SPRA550)

A series of DSP textbooks is published by Prentice-Hall and John Wiley & Sons to support digital signal processing research and education. The TMS320?DSP newsletter, Details on Signal Processing, is published quarterly and distributed to update TMS320?DSP customers on product information.

Updated information on the TMS320?DSP controllers can be found on the worldwide web at:

http://www.ti.com.

To send comments regarding this TMS320x240xA data sheet (literature number SPRS145), use the comments@books.sc.ti.com email address, which is a repository for feedback. For questions and support, contact the Product Information Center listed at the http://www.ti.com/sc/docs/pic/home.htm site. Migrating from 240x devices to 240xA devices

This section highlights the new features/migration issues of the 240xA devices (as compared to the 240x family) and describes the impact these features/issues have on user applications.

Maximum clock speed

240xA devices can operate at a maximum speed of 40 MHz compared to the 30-MHz operation of 240x devices. This change in clock speed warrants a change in the register contents of all the peripherals. For example, to maintain the same baud rate, the divisor values that are loaded to the SPI, SCI, and CAN registers must be recalculated. Code security module

240xA devices incorporate a ―code security module‖ which protects the contents of

TMS320LF2406A,

TMS320LF2403A,

TMS320LF2402A,

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石家庄铁道学院毕业论文

program memory from unauthorized duplication. Passwords stored in password locations (PWL) 0040h to 0043h are used for this purpose. Even if the code is not secured with passwords (i.e., PWL contains FFFFFFFFFFFFFFFFh), the PWL must still be read to gain access to the program memory contents. Note that locations 0040h to 0043h were available for user code in the 240x devices, which lack the ―code security module‖. In 240xA devices, these locations are reserved for the passwords and are not available for the user code. Even if code security feature is not used, these locations must be written with all ones. This fact must be borne in mind while submitting ROM codes to TI. Input-qualifier circuitry

An input-qualifier circuitry qualifies the input signal to the CAP1–6, XINT1/2, ADCSOC, and PDPINTA/B pins in the x240xA devices. The state of the internal input signal will change only after these pins are high/low for 6 (12) clock edges. The user must hold the pin high/low for 6 (12) cycles to ensure that the device see the level change. The increase in the pulse width of the signals used to excite these pins must be taken into account while migrating from the 240x to the 240xA family. Bit 6 of the SCSR2 register controls whether 6 clock edges (bit 6 = 0) or 12 clock edges (bit 6 = 1) are used to block 5- or 11-cycle glitches. This bit is a ―reserved‖ bit in 240x devices. Status of the PDPINTx pin

The current status of the PDPINTx pins is now reflected in bit 8 of the COMCONx registers. This bit is a ―reserved‖ bit in 240x devices. Operation of the IOPC0 pin

At reset, all LF240xA devices come up with the W/R/IOPC0 pin in W/R mode. On devices that lack an external memory interface (e.g., LF2406A), W/R mode is not functional and MCRB.0 must be set to a 0 if the IOPC0 pin is to be used. The XMIF Hi-Z control bit (bit 4 of the SCSR2 register) is reserved in these devices and must be written with a zero.

External pull down resistor for TRST pin

An external pull down resistor may be needed for the TRST pin in boards that operate in noisy environments. Refer to the TRST pin description for more details.

TMS320LF2407, TMS320LF2406, TMS320LF2402 DSP CONTROLLERS

SPRS094G – APRIL 1999 – REVISED AUGUST 2001

57 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443

Development support

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