8. 2-channel 12-bit D / A converter: STM32F103xC STM32F103xD STM32F103xE unique. 9. A maximum of up to 112 fast I / O ports: Depending on the model, 26,37,51,80, and 112 I / O ports, all ports can be mapped to the 16 external interrupt vector. In addition to the analog input can accept less than 5V input.
10. A maximum of up to 11 timers: four 16-bit timers, each timer 4 IC / OC / PWM or pulse counter. Two 16-channel advanced control timer: up to 6 channels for PWM output. 2 watchdog timers (independent watchdog and window watchdog). Systick timer: 24-bit down counter. Two 16-bit basic timer is used to drive the DAC.
11. A maximum of up to 13 communication interfaces: two IIC interface (SMBus / PMBus), 5 USART interface (ISO7816 interface, LIN, IrDA compatible, the debugging control), Three SPI interface (18 Mbit / s), two and IIS reuse, CAN interface (2.0B), USB 2.0 full-speed interface, SDIO interface.
12. ECOPACK package: STM32F103xx family of microcontrollers ECOPACK package. System role
1. Integrated embedded Flash and SRAM memory, ARM Cortex-M3 core. And compared to the 8/16 devices, the ARM Cortex-M3 32-bit RISC processor provides a higher efficiency of the code. The STM32F103xx microcontroller with an embedded ARM core, so can be compatible with all ARM tools and software.
2. Embedded Flash memory and RAM memory: built-up to 512KB embedded Flash, can be used to store programs and data. Up to 64KB of embedded SRAM can read and write to the clock speed of the CPU (not wait state).
3. A variable static memory (FSMC): FSMC embedded in STM32F103xC, STM32F103xD, STM32F103xE, with four chip select support four modes: Flash, RAM, PSRAM, NOR and NAND. After OR after three FSMC interrupt lines connected to the NVIC. No read / write FIFO PCCARD outside, the code is executed from the external memory, and does not support the Boot took target frequency equal to SYSCLK / 2 Therefore, when the system clock is 72MHz, external access, according to 36MHz.
4. Nested vector interrupt controller (NVIC): can handle 43 maskable interrupt channels (not including the 16 interrupt lines of Cortex-M3), provides 16 interrupt priority. Tightly coupled NVIC lower interrupt processing delay directly passed to the kernel interrupt entry vector table address, tightly coupled the NVIC kernel interface, allows interrupts to be anticipated, after the higher-priority interrupt handling support tail chain,
automatically save the state of the processor, interrupt entry automatically resume when the interrupt exit, no instruction intervention.
5. The external interrupt / event controller (EXTI): External interrupt / event controller for 19 to generate an interrupt / event request edge detector lines. Each line
can be individually configured to select the trigger event (rising edge, falling edge, or both), can also be individually shielded, a pending register to maintain the state of the interrupt request. When the external line appear longer than internal APB2 clock cycle pulse, EXTI is able to detect. Up to 112 GPIO connected to the 16 external interrupt lines.
6. Clock and start: start or system clock selection, but reset when the internal 8MHz crystal was selected as the CPU clock. Can select one of 4-16MHz external clock, and will be monitored to determine whether successful. During this period, the controller is disabled and the software interrupt management subsequently also be prohibited. At the same time, if there is a need (for example, encountered an indirect use of crystal failed), PLL clock interrupt management fully available. Multiple pre-comparator can be used to configure the AHB frequency, including high-speed APB (PB2) and low-speed APB (APB1), high-speed APB highest frequency of 72MHz, low-speed APB highest frequency of 36MHz.
7. Boot mode: startup, Boot pin is used to select one of three kinds Boot Options kinds: Import from user Flash memory from the system import, import from SRAM. The Boot import program is located in the system memory for Flash Memory Programming by USART1 re.
8. Power supply program: VDD voltage range of 2.0V-3.6V, VDD pin provides an external power supply through, for I / O and internal regulator. VSSA and VDDA, voltage range of 2.0-3.6V, external analog voltage input for the ADC reset module, RC and PLL VDD range (ADC is limited to 2.4V); VSSA and VDDA must be corresponding connection to VSS and VDD. VBAT, the voltage range of 1.8-3.6V, VDD invalid for RTC, external 32KHz crystal oscillator and backup registers power supply (via the power switch to achieve).
9. Power management: The device has a power-on reset (POR) circuit and power-down reset (PDR). This circuit has been used to ensure that the necessary operating from 2V starts fell to 2V. When VDD drops below a specific lower limit VPOR / PDR, without the need for an external reset circuit, the device can also be held in reset mode. Equipment specific to an embedded programmable voltage detector (PVD) PVD for detecting VDD compare and VPVD limit, will generate an interrupt when VDD to lower than VPVD or VDD greater than VPVD. Interrupt service routine can generate a warning message or MCU will be set to a safe state. PVD is enabled by software.
10. Voltage regulator: The regulator has three operation modes: main (MR), low power (LPR) and power-down. MR used in the traditional sense of the adjustment mode (operating mode), LPR is used in the stop mode, power down in standby mode: regulator output is high impedance, the core circuit power-down; including zero consumption (the contents of the registers and SRAM will be lost).
11. The low-power mode: STM32F103xx support three kinds of low-power mode, so as to achieve the best balance between low-power, short start-up time and wake-up source available.
Sleep mode: only the CPU stops working, all peripherals continue to run, wake up the CPU interrupt / event occurs; Stop mode: allows keeping the contents of the SRAM and registering with minimal power consumption. The 1.8V regions of the clock are stopped, the PLL, the HSI and the HSE RC oscillators are disabled, and the regulator is set to normal or low-power mode. The device can wake-up from stop mode by external interrupt lines. The external interrupt sources can make one of the 16 external interrupt lines, PVD output or TRC warning. Standby mode: the pursuit of minimum power consumption, the internal voltage regulator is turned off, so 1.8V regional power outage. PLL, HSI and the HSE RC oscillators are also closed. Enter standby mode, in addition to backup register and Standby circuit, SRAM and register contents will be lost. When an external reset (NRST pin), the IWDG, reset, WKUP pin a rising edge or TRC warning occurs, the device out of standby mode. Enters the stop mode or standby mode, TRC, IWDG clock source does not stop.
f. Architectural advantages
In addition to the new features enhanced peripheral interface, STM32 interconnection series also provide the same standard interface with other STM32 microcontroller shared this peripheral enhance application flexibility of the entire product family, so that developers can multiple designs to repeated use of the same software. New STM32 standard peripherals include 10 timers, two 12-Msample / s analog-to-digital converter (Interleaved 2-Msample / s mode), two 12-bit digital-to-analog converters, two I2C interface five the USART interface and three SPI ports. A total of 12 new products peripheral DMA channels, there is a CRC calculation unit, like other STM32 microcontroller supports 96 unique identification number.
The new family of microcontrollers also has followed the STM32 product family of low-voltage and energy-saving advantages. The operating voltage range of 2.0V to 3.6V, compatible with mainstream battery technology, such as lithium batteries and nickel-metal hydride batteries, the package also features a battery mode dedicated pin V bat. 72MHz frequency code execution from flash consumes only 27mA of current. Low-power mode, there are four; the current consumption can be reduced to two microamps. Fast start from the low-power mode to save energy; start circuit STM32 internally generated 8MHz signal to wake up the microcontroller from stop mode with less than 6 microseconds.
一、STM32简介
STM32系列是为要求高性能、低成本、低功耗的嵌入式应用专门设计的ARM Cortex-M3内核。按性能分成两个不同的系列：“增强型”STM32F103系列和STM32F101“基本型”STM32F101系列。增强型系列时钟频率达到72MHz，是同类产品中频率最高的产品；基本型时钟频率为36MHz，以跟16位产品一样的价格得到比16位产品更大的性能，是16位产品的最佳选择。两个系列都内置32K到128K的闪存，不同的是SRAM的最大容量和外设接口的组合。时钟频率为72MHz时，从闪存执行代码来看，STM32功耗36mA，是32位市场上功耗最低的产品，相当于0.5mA/MHz。
(一)意法半导体
1987年6月意法半导体公司成立，是由意大利的 SGS 微电子公司和法国 Thomson 半导体公司合并而成。1998年5月，SGS-THOMSON Microelectronics 将公司名字改为意法半导体有限公司。意法半导体公司是世界最大的半导体公司之一。从成立至今，ST 的增长速度超过了半导体工业整体增长的速度。从1999年起，ST 一直是世界十大半导体公司之一。根据最新的工业统计数据，意法半导体是全球第五大半导体厂商并且在很多市场居世界领先水平。例如，意法半导体是世界最的大模拟芯片和电源转换芯片的制造商，也是世界第一大工业半导体和机顶盒芯片供应商，而且在分立器件、手机相机模块和车用集成电路一直领域居世界前列。
意法半导体集团共有员工近 50000 名，拥有 16 个先进的研发机构、39 个设计和应用中心、15 主要制造工厂，并在 36 个国家设有 78 个销售办事处。公司总部设在瑞士日内瓦，也是欧洲和新兴市场的总部；公司的美国总部设在德克萨斯州达拉斯市的卡罗顿；亚太区总部设在新加坡；日本的业务则以东京为总部；大中国区总部设在上海，主要负责香港、大陆和台湾三个地区的业务。
1994年12月8日首次公开发行股票以来，意法半导体已经在纽约证券交易所和泛欧巴黎证券交易所挂牌上市，1998年6月，又在意大利米兰证券交易所上市。意法半导体拥有大约 9 亿股公开发行股票，有大约 71.1% 的股票是在证券交易所公开交易的。另外大约有 27.5% 的股票由意法半导体控股有限公司持有，其股东为 Finmeccanica 和 CDP 组成的意大利 Finmeccanica 财团和 Areva 及法国电信组成的法国财团；剩余 1.4% 的库藏股由意法半导体公司持有。
(二)ST超低功耗 ARM Cortex-M0 微控制器
STM32F0 系列产品基于超低功耗的 ARM Cortex-M0 处理器内核，整合增强的技术和功能，瞄准超低成本预算的应用。该系列微控制器缩短了采用 8 位和 16 位微控制器的设备与采用 32 位微控制器的设备之间的性能差距，能够在经济型用户终端产品上实现先进且复杂的功能。
百度搜索“77cn”或“免费范文网”即可找到本站免费阅读全部范文。收藏本站方便下次阅读，免费范文网，提供经典小说综合文库机电与自动化专业STM32简介Introduction-of-STM32大学毕业论文外(2)在线全文阅读。
相关推荐：